implement get opcode from instr
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vik
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0531db1641
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71
src/isa.rs
Normal file
71
src/isa.rs
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@ -0,0 +1,71 @@
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#[allow(dead_code)]
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use crate::vm::VM;
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enum Opcode {
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BR = 0,
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ADD,
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LD,
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ST,
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JSR,
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AND,
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LDR,
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STR,
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RTI,
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NOT,
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LDI,
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STI,
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JMP,
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RES,
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LEA,
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TRAP,
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NOOP,
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}
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fn get_opcode(instr: u16) -> Opcode {
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match instr >> 12 {
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0 => Opcode::BR,
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1 => Opcode::ADD,
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2 => Opcode::LD,
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3 => Opcode::ST,
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4 => Opcode::JSR,
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5 => Opcode::AND,
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6 => Opcode::LDR,
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7 => Opcode::STR,
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8 => Opcode::RTI,
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9 => Opcode::NOT,
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10 => Opcode::LDI,
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11 => Opcode::STI,
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12 => Opcode::JMP,
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13 => Opcode::RES,
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14 => Opcode::LEA,
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15 => Opcode::TRAP,
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_ => Opcode::NOOP,
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}
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}
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pub fn execute_opcode(vm: &mut VM) {
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let instr = vm.memory.get(vm.registers.pc);
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let opcode = get_opcode(instr);
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match opcode {
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Opcode::ADD => noop(instr, vm),
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Opcode::AND => noop(instr, vm),
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Opcode::NOT => noop(instr, vm),
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Opcode::BR => noop(instr, vm),
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Opcode::JMP => noop(instr, vm),
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Opcode::JSR => noop(instr, vm),
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Opcode::LD => noop(instr, vm),
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Opcode::LDI => noop(instr, vm),
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Opcode::LDR => noop(instr, vm),
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Opcode::LEA => noop(instr, vm),
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Opcode::ST => noop(instr, vm),
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Opcode::STI => noop(instr, vm),
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Opcode::STR => noop(instr, vm),
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Opcode::TRAP => noop(instr, vm),
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_ => {}
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}
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}
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fn noop(instr: u16, vm: &mut VM) {}
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3
src/lib.rs
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3
src/lib.rs
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@ -0,0 +1,3 @@
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pub mod mem;
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pub mod isa;
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pub mod vm;
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164
src/main.rs
164
src/main.rs
@ -1,161 +1,13 @@
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#![allow(dead_code)]
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mod mem;
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use core::panic;
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// use std::env;
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// use std::fs;
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// use std::io;
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// use std::io::Read;
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use std::{env, u16};
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use mem::Memory;
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const PC_START: u16 = 0x300;
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enum Opcodes {
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BR = 0,
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ADD,
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LD,
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ST,
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JSR,
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AND,
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LDR,
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STR,
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RTI,
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NOT,
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LDI,
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STI,
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JMP,
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RES,
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LEA,
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TRAP,
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}
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struct Registers {
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r0: u16,
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r1: u16,
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r2: u16,
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r3: u16,
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r4: u16,
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r5: u16,
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r6: u16,
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r7: u16,
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pc: u16,
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cond: u16,
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}
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enum ConditionFlags {
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// condition flags can only be set as nzp with a 1 in each position
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POS = 1 << 0,
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ZERO = 1 << 1,
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NEG = 1 << 2,
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}
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impl Registers {
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fn new() -> Registers {
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Registers {
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r0: 0,
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r1: 0,
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r2: 0,
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r3: 0,
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r4: 0,
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r5: 0,
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r6: 0,
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r7: 0,
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pc: PC_START,
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cond: 0,
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}
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}
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// s/o dogeystamp for this cool register return logic
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// most other vms just updated it with a &mut self
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fn return_register(&mut self, num: u16) -> &mut u16 {
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match num {
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0 => &mut self.r0,
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1 => &mut self.r1,
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2 => &mut self.r2,
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3 => &mut self.r3,
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4 => &mut self.r4,
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5 => &mut self.r5,
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6 => &mut self.r6,
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7 => &mut self.r7,
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8 => &mut self.pc,
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9 => &mut self.cond,
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_ => panic!("not a register!"),
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}
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}
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fn get_register(&mut self, num: u16) -> u16 {
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*self.return_register(num)
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}
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fn set_registers(&mut self, num : u16, value: u16) {
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*self.return_register(num) = value;
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}
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fn update_cond(&mut self, num : u16) {
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if *self.return_register(num) > 0 {
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self.cond = ConditionFlags::POS as u16;
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} else if *self.return_register(num) == 0 {
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self.cond = ConditionFlags::ZERO as u16;
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} else {
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self.cond = ConditionFlags::NEG as u16
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}
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}
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fn update_reg_and_cond(&mut self, num : u16, value: u16) {
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self.set_registers(num, value);
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self.update_cond(num);
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}
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}
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struct VM {
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memory: Memory,
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registers: Registers,
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}
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impl VM {
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fn new() -> VM {
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VM{
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memory: Memory::new(),
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registers: Registers::new(),
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}
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}
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fn execute(&mut self) {
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while self.registers.pc < 0x3010 {
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let instruction = self.memory.get(self.registers.pc);
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match instruction >> 12 {
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0 => println!("opcode BR at address {:#x}", self.registers.pc),
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1 => println!("opcode ADD at address {:#x}", self.registers.pc),
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2 => println!("opcode LD at address {:#x}", self.registers.pc),
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3 => println!("opcode ST at address {:#x}", self.registers.pc),
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4 => println!("opcode JSR/JSRR at address {:#x}", self.registers.pc),
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5 => println!("opcode AND at address {:#x}", self.registers.pc),
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6 => println!("opcode LDR at address {:#x}", self.registers.pc),
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7 => println!("opcode STR at address {:#x}", self.registers.pc),
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8 => println!("opcode RTI at address {:#x}", self.registers.pc),
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9 => println!("opcode NOT at address {:#x}", self.registers.pc),
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10 => println!("opcode LDI at address {:#x}", self.registers.pc),
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11 => println!("opcode STI at address {:#x}", self.registers.pc),
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12 => println!("opcode RET at address {:#x}", self.registers.pc),
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13 => println!("reserved opcode at address {:#x}", self.registers.pc),
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14 => println!("opcode LEA at address {:#x}", self.registers.pc),
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15 => println!("opcode TRAP at address {:#x}", self.registers.pc),
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_ => println!("this is a no op at address {:#x}", self.registers.pc),
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}
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self.registers.pc += 1;
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}
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}
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}
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mod vm;
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use mem;
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fn main() {
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let mut lc3 = VM::new();
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let args: Vec<String> = env::args().collect();
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let path = args.get(1).expect("a file must be specified");
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lc3.memory.read(path.to_string());
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lc3.execute();
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let lc3 = vm::VM::new();
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// let mut lc3 = VM::new();
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// let args: Vec<String> = env::args().collect();
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// let path = args.get(1).expect("a file must be specified");
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// lc3.memory.read(path.to_string());
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// lc3.execute();
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}
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@ -1,5 +1,3 @@
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#![allow(dead_code)]
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use std::{fs, io::{self, Read}};
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pub const MEM_SIZE: usize = u16::MAX as usize;
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111
src/vm.rs
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111
src/vm.rs
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@ -0,0 +1,111 @@
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#[allow(dead_code)]
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use crate::mem::Memory;
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const PC_START: u16 = 0x300;
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pub struct Registers {
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pub r0: u16,
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pub r1: u16,
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pub r2: u16,
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pub r3: u16,
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pub r4: u16,
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pub r5: u16,
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pub r6: u16,
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pub r7: u16,
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pub pc: u16,
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pub cond: u16,
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}
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enum ConditionFlags {
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// condition flags can only be set as nzp with a 1 in each position
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POS = 1 << 0,
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ZERO = 1 << 1,
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NEG = 1 << 2,
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}
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impl Registers {
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fn new() -> Registers {
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Registers {
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r0: 0,
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r1: 0,
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r2: 0,
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r3: 0,
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r4: 0,
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r5: 0,
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r6: 0,
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r7: 0,
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pc: PC_START,
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cond: 0,
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}
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}
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// s/o dogeystamp for this cool register return logic
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// most other vms just updated it with a &mut self
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fn return_register(&mut self, num: u16) -> &mut u16 {
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match num {
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0 => &mut self.r0,
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1 => &mut self.r1,
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2 => &mut self.r2,
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3 => &mut self.r3,
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4 => &mut self.r4,
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5 => &mut self.r5,
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6 => &mut self.r6,
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7 => &mut self.r7,
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8 => &mut self.pc,
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9 => &mut self.cond,
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_ => panic!("not a register!"),
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}
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}
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fn get_register(&mut self, num: u16) -> u16 {
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*self.return_register(num)
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}
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fn set_registers(&mut self, num : u16, value: u16) {
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*self.return_register(num) = value;
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}
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fn update_cond(&mut self, num : u16) {
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if *self.return_register(num) > 0 {
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self.cond = ConditionFlags::POS as u16;
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} else if *self.return_register(num) == 0 {
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self.cond = ConditionFlags::ZERO as u16;
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} else {
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self.cond = ConditionFlags::NEG as u16
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}
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}
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fn update_reg_and_cond(&mut self, num : u16, value: u16) {
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self.set_registers(num, value);
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self.update_cond(num);
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}
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}
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pub struct VM {
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pub memory: Memory,
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pub registers: Registers,
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}
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impl VM {
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pub fn new() -> VM {
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VM{
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memory: Memory::new(),
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registers: Registers::new(),
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}
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}
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}
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// pub fn execute(&mut self) {
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// while self.registers.pc < 0x3010 {
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// let instruction = self.memory.get(self.registers.pc);
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// match instruction >> 12 {
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// _ => todo!(),
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// }
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// self.registers.pc += 1;
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// }
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// }
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// }
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